Odrive 3.6 Schematic |verified| [TESTED · 2024]
ODrive v3.6
This report outlines the hardware architecture and schematic overview of the , a high-performance open-source motor controller designed for precise control of brushless DC (BLDC) motors. 1. System Architecture Overview
The Odrive 3.6 schematic diagram is available for download in a range of formats, including PDF and Eagle. The board's firmware is also open-source and available for download on the Odrive website. odrive 3.6 schematic
The v3.6 hardware is essentially an evolution of the v3.5 design, with the primary difference being the move to a 4-layer board and variations in capacitor voltage ratings. ODrive v3
The MCU features advanced timer hardware capable of generating high-resolution Pulse Width Modulation (PWM) signals. The schematic connects these timer outputs to the gate driver inputs. The ODrive firmware utilizes "Space Vector Modulation" (SVM Gate drivers and level shifting The MCU features